Performance Comparison of Full Adder Cells in 45nm Technology Node

Full Adder (FA) being an integral part of Arithmetic Logic Unit (ALU) of modern integrated circuits (IC) has gained massive research interest by academicians and industrial IC designers. Therefore, a large number of FA cell designs have been innovated, each of them having their respective pros and cons. As a result, it becomes quite necessary to examine the FA cells under a common environment in order to compare their performance parameters which will facilitate IC designers to choose the right FA topology required by the nature of ALU. This paper presents a comparison among 23 different FA cells. Performance comparison of the FAs has been conducted using Cadence design toolkits. The technology node used for the performance analysis and comparison is 45nm.