Electro-thermal Analysis of a 65 nm Channel MOSFET Under The HPEMP

Thermal effect caused by an external electromagnetic interference seriously threaten to a semiconductor device. In this paper, we have presented an electro-thermal analysis of a 65 nm channel metal-oxide-semiconductor field-effect transistor (MOSFET) under high power electromagnetic pulses (HPEMPs). The electro-thermal coupled process inside the MOSFET under HPEMPs is numerically studied in this paper by using a 3D TCAD model. The mechanism of heat generation inside the MOSFET is discussed by analyzing the distributions of temperature, electric field and carrier concentration inside the device. The position and structure of the heat source are analyzed. Heat source is a thin layer which lies on the top of the active zone. This analysis is useful for further failure estimating of MOSFET under HPEMP.