A High Sensitivity RF Energy Harvester for Diverse Environments

This paper presents a design methodology for high sensitivity RF energy harvesters operating at 915 MHz. The energy harvester topology is composed of a receiver antenna, a CMOS rectifier, an on-chip storage capacitor, a load and a power management unit. The antenna rectifier interface plays a crucial role in the energy harvester design, as it provides a passive voltage boosting, impacting the sensitivity and the robustness against environmental variations. This paper discusses the possible scenarios of mismatch between the antenna and the rectifier, since the antenna impedance can change significantly due to the environment. The design parameters are carefully analyzed, and simulations are verified by measurements taken from energy harvester chips fabricated in a 65-nm CMOS process.