A 65 nm CMOS SOI 4-bit Digitally Controlled Variable Gain Amplifier for Ka-Band Beamforming

This paper presents the design and implementation of Ka-band variable gain amplifier (VGA) digitally controlled in 65 nm CMOS SOI with low impedance and low phase variation. In this VGA topology, the control transistor is placed at the source of the differential pair of RF transistors. That allows to optimize the control transistor without impacting the RF performance. The gain control is done by switching positive and negative cells with different gm. Low impedance and low phase variation are achieved by keeping the same number of transistors ON and OFF and by gate-drain capacitor neutralization. The measured VGA achieves a 21.1 dB linear-in-magnitude tuning range with 8.8 dB gain peak. The RMS phase error is less than 2.2° over the 3-dB bandwidth of 25~33 GHz. The VGA consumes 21 mW with 1.4 V supply voltage and the input 1-dB compression point is -3.2 dBm. The chip size is 190 μm × 225 μm.