Experimental Monitoring of Aging in CMOS RF Linear Power Amplifiers: Correlation Between Device and Circuit Degradation

The high-frequency operation of RF circuits poses additional challenges to the prediction of their reliability during the initial design phase. Among them, the availability of device compact models that describe their aging under RF conditions and the model experimental validation at circuit level. In this work, RF test circuits that allow establishing device-circuit aging correlations are described. Two different 2.45 GHz power amplifier circuits with similar performance, implemented in a 65 nm CMOS technology, have been designed and experimentally characterized. Results demonstrate the importance of the topology selection to guarantee robustness against aging effects, and thus the need to predict their parameter degradation during the initial design phase, accounting for the actual DC and RF device operation conditions. With that purpose, we propose a semi-empirical MOSFET compact model that, based on the RMS equivalent voltages at the transistor terminals when operated within a RF circuit, can provide an accurate estimation of the device and circuit degradations.