Vulnerability Analysis of System-in-Package Based on Reliability Enhancement Testing Simulation

SiP (System-in-Package) is widely applied in electronic systems, whose complex structure and variable materials result in uncertainty of reliability. In this study, the common failure reasons of SiP devices are introduced and analyzed. In order to find out the weakness of SiP devices, vulnerability analysis is implemented by RET (Reliability Enhancement Testing) simulation with ANSYS Workbench. The SiP device made of components and interconnections is evaluated in the condition of thermal stress. The results show that solder joints and pins are the weaknesses of the SiP device.