Temperature effects on an HfO2-TiO2-HfO2 stack layer resistive random access memory cell for low power applications

In this paper we analyzed the forming voltage (V
_f
) and resistive switching characteristics of the fabricated nano structured trilayer resistive switching device (Pt/HfO
₂
/TiO
₂
/HfO
₂
/Pt). Standard fabrication process is opted with a post metal annealing (PMA) process to diminish the forming voltages of stack layer resistive random access memory (RRAM) cells. Result reveals after the post metal annealing, the V
_f
is reduced to 3.6 V from 4.4 V at room temperature (25°C). In addition at high background temperature (80°C) the V
_f
value is diminished significantly (3.2 V) compared to lower temperatures, 50° C and 25° C. We optimized, the forming environment temperature (80° C), compliance current (30 μA) for the further reduction of V
_f
value.