EMSpice: Physics-Based Electromigration Check Using Coupled Electronic and Stress Simulation

In this article, a novel full-chip EM simulation tool, called EMSpice simulator is proposed. The new method starts from first principles and simultaneously considers two major interplaying physics effects in EM failure process: the hydrostatic stress and electronic current/voltage in a power grid network. The new tool starts by reading the power grid layout information from Synopsys IC Compiler. It then removes immortal interconnect wires by considering both nucleation phase immortality and incubation phase immortality for multi-segment interconnects. Thereafter, a finite difference time domain (FDTD) solver is employed for stress analysis for every mortal interconnect tree for both nucleation and post-voiding phases. At the whole power grid circuit level, the EM analysis is coupled with IR drop analysis of a whole power grid network at each time step so that we can consider the interaction among stress, void growth, resistance change and IR drop in a single simulation framework. Accuracy of
EMSpice
is validated by comparing with a published EM simulator, XSim, for nucleation phase, and finite element method based COMSOL for post-voiding phase. The comparison results show that
EMSpice
agrees well with both methods with. Experimental results on two practical processor chip designs show that the proposed coupled EM-IR drop analysis method can further reduce the overly conservative EM-aware power grid design as the number of the failed trees found by
EMSpice
simulator is up to 76.7% less than the Black’s method and 66.7% less than a recently proposed full-chip EM analysis method respectively. Furthermore
EMSpice
simulator is the least conservative one for lifetime estimation of individual tree wires among the three methods.