A Second-order Sigma-delta Modulator with a Hybrid Topology in 180nm CMOS

Sigma-delta analog-to-digital converters (ADCs) are known as a good choice for high-quality low-to-medium frequency data acquisition systems. In this work, Cadence Virtuoso tools were used to design main components of a switched-capacitor sigma-delta modulator in a standard 180nm CMOS technology. Three second-order sigma-delta modulator topologies were then assembled and simulated. Both temperature variations and technology spread were taken into account. In the audio frequency range, the SNDR of 71.4 dB is achieved while the power consumption is 5 mW. The proposed hybrid topology is preferable for use as part of the sigma-delta ADC.