Experimental Verification of a Model of Switching Transients Considering Device Parasitic Capacitance for the Loss Estimation of Soft-switching Power Converters

This paper discusses switching transients of MOS-FETs aiming at the switching loss estimation of the power converter operated under the zero-voltage switching condition. A simple model of switching is described. In this switching model, a part of the current flowing into channel of the device during turn-off generates the turn-off loss at the instant of the turn-off, and the rest of the current contributes to charge the parasitic capacitance; therefore, does not generate switching loss. This paper experimentally verifies that the current flowing into the channel of the device causes the switching loss. This verification was demonstrated by the converter operated under the zero- voltage turn-on condition. In addition, this paper proposes that the current flowing into the channel can be estimated from the experimental conditions and the static characteristics of the device. The accuracy of the proposed method was experimentally verified by using the device model which consists of a device and external capacitors connected between each terminals which simulate the parasitic capacitance of the device.