SiC MOSFETs Modeling Considering Characteristics Variation for Module Parallel Applications

This paper describes a compact model of SiC MOSFETs along with structural parasitic in a 1200-V 320-A half-bridge power module, with intrinsic interdependence of variation of gate threshold voltage and on-state voltage incorporated through a TCAD-based response surface methodology. The model can reproduce experiment static characteristics with a relative error less than ±10% curve-wisely at nominal gate voltage in 25-175°C range with the presence of variations. Current imbalance ratio of paralleled 2-module is verified to be within ±2.5% error to experimental results. Incorporating gate bias dependence in terminal capacitances improves overall switching waveforms agreement with experimental results, with switching loss error less than ±10%. The model could be employed to derive switching loss and gate driving conditions for module parallel applications with tolerance requirement on modules' characteristics variation.