Low-Frequency Input Impedance Modeling of Single-Phase PFC Converters for Data Center Power System Stability Studies

This paper presents the development of new low-frequency input impedance models for single-phase power factor correction (PFC) converters and the use of such models in the analysis and mitigation of low-frequency resonance and instability problems in large data centers. The new models overcome the limitations of previous models by including the effects of dc output voltage control as well as the dynamics of dc-dc converters. These effects are shown to cause negative damping in the input impedance below the second harmonic frequency. The magnitude of the input impedance may also dip at two points that fall in this frequency range and are symmetrical about the fundamental. DC bus dynamics are further shown to cause a second input current response when the input voltage is perturbed by a harmonic below the second harmonic frequency. The combination of these factors is shown to be the root cause for recently experienced low-frequency resonance problems in large data centers. Based on the models and analyses, solutions are developed by modifying PFC converter control to shape its input impedance. The developed models are further used to support the development and implementation of new specifications and test procedures that will guarantee data center power system stability.