Modelling of ΔVT in NBT Stressed P-Channel Power VDMOSFETs

Negative bias temperature instabilities in commercial IRF9520 p-channel power VDMOSFETs were studied in order to design an analytical model for this effect. A modelling framework is proposed, which tends to be in line with earlier obtained experimental data. Since the pulsed voltage stressing caused generally lower shifts as compared to static stressing performed at the same temperature with equal stress voltage magnitude, different kind of models are considered for static and pulsed stressing. Differences between static and pulsed NBT stress depend on both stress duty cycle and frequency, and the differences become more significant as the duty cycle decreases and frequency increases. Because of that, described model intent to apply to specific stress signal, but also to be adaptable to different types of stress signal. Modelling of threshold voltage shifts induced by pulsed negative bias temperature stress has been done on the bases of experimental results.