Demonstration of a Fully-Vertical GaN MOSFET on Si

In this article, we have demonstrated the fabrication of first GaN-on-Si based fully-vertical metal-oxide-semiconductor field-effect transistor (V-MOSFET) by introducing a p-GaN current aperture (CA) in the device structure to control the vertical current conduction. The p-GaN CA was constructed by using plasma-based dry etching and epitaxial regrowth technique. The electrical measurements on the device exhibited its capability in both vertical and lateral modes of operation. We achieved a drain current density (ID) of 0.25 A/mm with an ON-resistance (R
_ON
) of 44 Ω-mm and a threshold voltage (V
_th
) of - 20 V for the vertical mode of operation. The comparison of the electrical results indicates a relatively higher ON-resistance of the device in the vertical configuration. In spite of relatively lower drain current and higher R
_ON
, this device structure would be a potential and cost-effective prototype for the realization of fully-vertical GaN MOSFETs on Si for the next generation power device applications.