New Cost-Effective Via-Last Approach by "One-Step TSV" After Wafer Stacking for 3D Memory Applications

A new cost-effective via-last through silicon via (TSV) process after multiple wafer stacking named "one-step TSV" is proposed and developed for 3D stacked memory module applications. According to cost modeling, one-step TSV could reduce more than 50% process cost compared to other stacking technology using hybrid bonding with conventional TSV. 4-wafer-stack fusion bonding combining face-to-face and back-to-back bonding was successfully demonstrated without any interfacial voids. Good TSV connections at the sidewall of the Al pads were also confirmed by electrical test. This cost-effective 3D integration approach has huge potential to expand application area not only for stacked DRAM but also stacked NAND flash, Memory/Logic 3D-SiP, 3D-FPGA, and image sensor devices etc.