Comparative Analysis of Memory Efficient Hardware Architectures for Lifting Based and Non-Stationary Filter Based 5/3 2-D Inverse DWT

This paper presents comparative analysis of two different memory efficient hardware architectures for 5/3 two-dimensional (2-D) inverse discrete wavelet transform (DWT). The first one is based on lifting 5/3 inverse filters, while the second one is based on non-stationary 5/3 inverse filters. Both architectures require the lowest size of memory compared to other architectures published in the literature, but differs in terms of used logic resources. Both architectures are suitable for implementation in JPEG 2000 image decoder which uses 5/3 inverse DWT filters.