Optimal VDD Assessment of CMOS Technology Considering Circuit Reliability Tradeoffs

In this paper, the NBTI-induced circuit frequency degradation is found having a non-monotonic bias dependence, thus an optimal V
_DD
can be assessed based on this reliability tradeoff. As a demonstration, based on our recently-developed compact aging model and circuit reliability simulator, NBTI-induced frequency degradation in inverters are simulated, in terms of various V
_th
and V
_DD
, considering two typical stress waveforms. The results show the relationships between the optimal V
_DD
of circuit and various stress conditions, which are useful to the reliability-aware V
_DD
optimization for CMOS technology.