Optimised Design and Implementation of SVPWM Switching sequences for Five level VSI

This paper proposes an efficient digital implementation of synchronised open loop SVPWM control for five level inverter in a low cost controller. The proposed timing computation and region detection algorithm enhances the computation speed and optimises the memory requirement in an 8 bit controller. The synchronised SVPWM sequences are implemented with a fundamental frequency of 50Hz. The proposed scheme is validated by simulation results in Matlab platform. The optimised SVPWM control scheme are validated experimentally with a low cost PIC microcontroller (PIC18F452) and verified experimentally with a 2 KVA three phase five level insulated gate bipolar transistor (IGBT) based VSI.