Multi-dimensional Thermometer Decoders for Unary DACs

A digital-to-analog converter (DAC) with a unary architecture requires a thermometer decoder, which delay of conversion is a bottleneck of the DAC performance. A solution is an increase of groups number in the decoder for a decrease the delay. In this paper, general case of a multi-dimensional decoder is considered, and estimations are given for a number of logic gates and for delay of conversion. Moreover, the extreme decoder is discussed, and the rule of a logic function generation is formalized.