High Frequency Power Integrity Design Sensitivity to Package Design Rules

Package design rules are traditionally determined by signal integrity reasons. However, these determine the total package inductance and the number of capacitors that can be installed, in turn determining the highest frequency impedance peak in the power delivery network. This paper provides an overview of design rule impact to electrical metrics. Simple equations and simulations based on electromagnetic extractions of representative microprocessor packages are utilized throughout. Based on these guidelines are provided for capacitor spacing and PTH size & placement evaluation as logic block sizes shrink with process node advancement.