40× Retention Improvement by Eliminating Resistance Relaxation with High Temperature Forming in 28 nm RRAM Chip

In this work, we proposed a high temperature forming scheme for 28 nm 1Mb RRAM test chip. Compared with room temperature forming scheme, the average forming voltage performed at 125 °C could be greatly reduced from 2.5 V to 1.7 V. Resistance relaxation resulted from the recombination of Vo and 0
^2-
that generally occurred after programming was effectively eliminated as the residual 0
^2-
in the filament was highly decreased. Benefit from this, retention improvement of more than 40× times was successfully achieved.