Implementation of ECC on Reconfigurable FPGA Using Hard Processor System

This study is proposed to design and implement Elliptic Curve Cryptography (ECC) on reconfigurable Field Programmable Gate Array (FPGA). The implemented ECC based on Galois Field Polynomial (GF(2
^m
)). This type of ECC has the advantage of compatibility to be implemented in hardware. The choosen size of ECCs are on the size of 163, 233, 283, and 409. The ECC program will be implemented on FPGA with reconfigurable interface on Hard Processor System (HPS). Both input and output are controlled via PC. ECC development work is done by using High-Level Synthesis (HLS) tool. HLS tool is capable of generating Hardware Description Language (HDL) files from C language. The program for configuring FPGA is needed and implemented on HPS. This program is able to reconfigure the logic gate of FPGA based on the given instructions by uploading the raw binary file (rbf) to the FPGA chip. The program is accessed directly from PC via an ethernet cable in a local netwok. Implementation is carried out in FPGA DE10 Standard and using Linux Console BSP as operating system for ARM in HPS.