FPGA implementation of SHEPWM gate signal IGBTs

This paper deals the generation of all signal gates for three-level inverter using FPGA SPARTAN-3E device. The PWM switching angles are computed on the basis of the selective harmonics elimination for several frequency values. In order to cancel three odd harmonics the arm voltage waveform profile contains four switching angles. For, the experimental results, three phase three level inverter hardware circuit is constructed using six IGBTs modules. Before configuring the FPGA device, all signals are checked on ModelSim environment. Experimental results using SAPRTAN-3E starter kit are presented validate the proposed implementation.