RTN impacts on RRAM-based Nonvolatile logic circuit

Random telegraph noise (RTN) in resistive random access memory (RRAM) introduces variation in resistance which might cause errors in RRAM based logic circuits. In this paper, we find multiple RTN patterns in RRAM devices and build a simulation model. Using this model, noise immunity of a RRAM based IMP logic circuit is evaluated and method to suppress RTN's effect is proposed.