Method to Model Vccin Feedthrough Noise in Multi-Domain Fully Integrated Voltage Regulators

The on-chip power supply domains of high performance server microprocessors are generated using built-in switching voltage regulators (also know as Fully Integrated Voltage regulators-FIVRs). The advantages of integrated voltage generation are improved performance and reduced platform cost. However, the FIVRs share a common input power plane in the package and the coupling of noise between FIVRs is of significant concern. This noise is also known as the Vccin feedthrough noise. The modeling of the vccin feedthrough noise using circuit simulation tools such as SPICE is a laborious and time consuming task. This paper proposes a simple method to accurately predict the vccin feedthrough noise based on the state-space averaged small signal method. This method simplifies the modeling of vccin feedthrough noise and saves lot of time and effort.