Design of High Performance XOR and XNOR Logic Gates without MOS Devices

A design of high performance and area-efficient XOR and XNOR logic gates based on memristors is proposed, which consuming only 3 memristor cells and 3 clock cycles, 4 memristor cells and 4 clock cycles, respectively. The input of the gates is applied by voltage, and the output is presented as resistance value of the output cell. The proposed gates are MOS-less, and can be integrated into the 3D crossbar memristor array.