Co-design for Extreme Large Package Solution with Embedded Fine Pitch Interposer (EFI) Technology

Embedded Fine pitch Interposer (EFI) technology using Fan-out approach is demonstrated for heterogeneous integration as a cost effective and enabling technology. Co-design modelling methodology is established for EFI technology, including wafer process, package assembly and board level reliability to optimize structure design, wafer process, assembly process and material selection. Through wafer warpage modelling, desirable glass carrier, photo-dielectric and molding compound materials are suggested to reduce wafer warpage. Effects of second molding and stiffener on assembly induced package warpage are simulated. Board level solder joint reliability is investigated and optimized based on simulation results. The optimized materials and structure design are determined based on co-design modeling and simulation results to achieve successful EFI wafer fabrication, assembly process and board level reliability for extreme large package with EFI interposer.