Carrier conduction in SiO2/GaN structure with abrupt interface

A monolithic GaN power integrated circuit (IC) with power devices, logic, drive, and protection circuits is a candidate system for a future low power consumption power IC. Formation of a high quality GaN MOS interface is a key for realizing the GaN Power IC. Although a good interface property of a SiO
₂
/GaN structure have already reported[1], the SiO
₂
/GaN structure has obvious interfacial Ga-oxide layer. On the other hand, we have established to form a SiO
₂
/GaN interface without an obvious interfacial layer and with a low interface trap density (D
_It
)[2]. However, carrier conduction in the SiO
₂
/GaN structure with the abrupt interface has not yet been investigated. In this study, characteristics of current density (J) vs oxide field (E
_ox
) in the SiO
₂
layers formed by the remote-oxygen- plasma enhanced CVD (ROPE-CVD) on a GaN surface were investigated through comparisons of J-E
_ox
characteristics between GaN and Si MOS capacitors.