A dimension-reduced artificial neural network for the compact modeling of semiconductor devices

A dimension-reduced artificial neural network (DRANN) is proposed for the compact modeling of semiconductor devices. The fully connected feedforward artificial neural network (FFANN) is known for its universal fitting ability, however, measurement data are usually not sufficient to train the FFANN, for example, semiconductor devices are commonly measured under limited (2 or 3) ambient temperatures, which will cause overfitting problem if temperature is directly taken as the input of FFANN. In this paper, DRANN is proposed to address the overfitting problem for multi-dimensional data mapping. The dimensions (such as port voltages) with enough datasets are modeled by FFANN, whilst other dimensions (such as thermal and traps) with few datasets are represented by Taylor expansion. DRANN is finally a combination of multiple low-dimensional FFANNs. The DRANN is verified by the accurate prediction of pulsed I-Vs (PIVs) of GaN HEMT with various thermal and trap states.