Study and analysis of communication logic between FPGA and the server

The ZYNQ is an all programmable system on chip (APSoC). The ZYNQ 7020 is used as a target board in this design [1]. The APSoC has two parts PS and PL. The paper objective is to develop the communication between the Zynq PS and the server or host PC [2]. The stream of data packets are sent from the PL part of the APSoC and stored in the DDR3 memory. The stored data packets are read by using the ARM Cortex A9 processors. Those data packets are transferred to the external PC through Ethernet. To implement this Xilinx Vivado and SDK tools are used.