Resource-reconfigured flow shop scheduling and lot-sizing problems in semiconductor test

This paper presents a study of the production planning decisions in the context of semiconductor test industry. In our problem, the items to be tested need to go through a series of stages (stations) which require different configurations of resources (kits) which are shared among stages. We establish two novel mixed integer programming models, with the objective to minimize the total processing cost, subject to the resource reconfiguration constraints on the test resources, machine capacity, and the changing-over time for setting up the station for different stages. Numerical examples are conducted to illustrate the performance of our models, and the comparisons between the two models are given as well.