Hybrid CMOS SET based gray to binary code converter

Presently communication devices adhere to low power consuming high speed and low dimensional topology. In regard CMOS downscaling is a pivotal issue in device engineering. To the contrary, since the dawn of the previous decade ITRS roadmap demonstrated the limitations of CMOS downscaling. Consequently, new devices appeared among which single electronics is at driving seat. But empirical study reveals that SET alone cannot achieve triumph over CMOS with the available fabrication expertise. Thus hybridization of SET with CMOS is being largely pondered over and a new device principle augmented the concurrent Nano device engineering. Hybrid CMOS-SET (HCS), even in its embryonic stage catered enough interest both in industry and academia. The authors here intend to mobilize HCS in computational vicinity. Accordingly HCS is first improvised and the same is incorporated further to design a code converter. The developed HCS converter is simulated using SIMULINK of MATLAB and the results are quite satisfactory.