Analysis of gate signal interference in an integrated SiC MOSFET module

A silicon carbide MOSFET half-bridge module is fabricated with 1200V devices from wolfspeed. The gate drivers and the decoupling capacitors are integrated in this module. The layout of the direct bonded copper (DBC) board is designed to minimize stray inductance and module size. The gate signal interference occurring during the double pulse test (DPT) is analyzed in detail with an analytical model. Experiments are done to verify this analytical model, and impact of the gate signal interference is discussed to offer better guidance for the design of the integrated power module. Solutions are also provided to eliminate the gate signal interference.