Simulations of threshold logic unit problems using memristor based synapses and CMOS neuron

This paper presents an implementation of Threshold Logic Units (TLU), the special case of an Artificial Neural Network (ANN), using discrete circuit elements like memristors as synapses and CMOS circuits as a neuron. Simple threshold logic gates have been developed using a single layer network to establish a base upon which more complex problems can be implemented. The XOR problem, benchmark for a simple multilayer neural network circuit, has also been simulated in this paper as an example of multiple layer networks. Once the circuit is developed, the memristors are trained to their weights. The logical output of the neuron is checked whether the circuits are working or not. Successful demonstrations and simulation of the basic logic gates have been shown which can contribute to the development of using the memristor-based neural network.