A comparative study of strain and Ge content in Si1−xGex channel using planar FETs, FinFETs, and strained relaxed buffer layer FinFETs

Strained Si
_1-x
Ge
_x
channel pFinFETs and planar pFETs are fabricated on a strain relaxed buffer virtual substrate to comparatively study the electrical impact of strain and Ge content in the Si
_1-x
Ge
_x
channel. By comparing the transistor electrical properties of Si
_1-x
Ge
_x
pFETs on SRB with Si
_1-x
Ge
_x
pFETs on Si substrate, we successfully decouple the influence of strain and Ge content in the Si
_1-x
Ge
_x
channel on device performance such as gate stack quality, reliability, and carrier transport. Based on these understandings, dual channel Si/Si
_1-x
Ge
_x
FinFETs on the SRB with the optimized surface orientation is proposed to further improve the device performance.