A SEU test and simulation method for Zynq BRAM and flip-flops

Zynq is designed to provide higher overall system performance and programmable flexibility at lower power consumption, which is consistent with the trend of commercial small satellite computers. Although modern commercial Zynq chips offer those aforementioned advantages, On-Chip Block RAM(BRAM) and flip-flops(FF) are susceptible to Single Event Upsets(SEU) in space application. We proposed built-in self-test circuits to test the SEU cross sections of BRAM and FF based on the analysis of the basic structure and application requirements of Zynq. To verify the validity of the self-test circuits, the fault injectors are designed to simulate the SEU at any position in any BRAM and each FF. The design can be used for space-borne and ground heavy ion test of Zynq chips.