Hardware acceleration of image processing algorithms using Vivado high level synthesis tool

In this paper, image processing algorithms are designed using high level synthesis and implemented on different hardware platforms. These implementations are compared in terms of speed, latency and resource utilization on various hardware platforms. The use of pipelining to reduce the latency is illustrated with an example. Using high level synthesis the designer has the opportunity to employ libraries similar to OpenCV and can take advantage of the productivity benefits of working at a higher level of abstraction, while creating high-performance hardware. Basic image processing algorithms like calculating histogram, histogram equalization, averaging filter and laplacian filter are chosen to explain hardware acceleration using high level synthesis. The workflow of implementing high level C / C++ / SystemC code in hardware using Vivado high level synthesis tool is explained along with implementation results of various Image Processing algorithms.