Design of SPI Protocol with DO-254 Compliance for Low Power Applications

This paper shows the working of a SPI protocol for single master-single slave, independent slave & daisy chain configuration operation. For the slave to communicate with the master, the slave select signal must be active low for communication to happen. The protocol follows the most stringent standards so has to develop a fool proof design and has been implemented using the industry standard "DO-254 standards"[1]. DO-254 standard provides an assurance for the design which can be used for real time applications like airborne, military, and avionics application. To implement DO-254 standard, ReqTracer, HDL designer, Questasim, and Precision RTL Plus tools are used at different phases of the FPGA flow. It is verified using Assertion based Verification (ABV). The power is optimized, so that the SPI protocol will be used in low power applications as compared with the previous results[1].