3D implementation of heterogeneous topologies on MPSoC

Network-on-Chip (NoC) on Microprocessor System-on-Chip (MPSoC) has emerged as the new generation communication infrastructure providing a promising solution to connect different IPs through a scalable, effective and modular communication network. NoC could bring significant improvement over crossbar interconnections and conventional bus. To design an efficient NoC, the choice of suitable network topology is very important. Wrong choices can affect the network performance. Critical factors of selection for correct topology are degree of the network, diameter of the network, throughput of the network and latency of the network. In this paper we are proposing the communication on 3D heterogeneous topology implementation on Microprocessor System on Chip. My work here explores the combination of 2D Mesh and 2D Hexagon in a 3D heterogeneous topology.