Signal and image processing techniques for VLSI failure analysis

For VLSI, internal electrical measurements are key steps to solve design debug issues and to perform failure analysis. Due to multiple metal layers, active areas of the chip are only accessible from the backside of the die. The ability of optical contactless techniques to operate through the silicon substrate and the few sample preparation required have widely contributed to promote them as unavoidable tools of the defect localization workflow. Timing issue or unusual consumption can be detected by static and dynamic photon emission analysis and Electro Optical Probing. The identification of the emission spots is an essential step of the process. Due to scaling, more and more emission nodes are located within the acquisition area so that large variations of emission intensity can exist and it is difficult to recover a signal with a good Signal to Noise Ratio (SNR). In this paper, automated techniques are reported to locate spots in these complex areas and to recover electrical waveforms with a good SNR. We will underline the challenge and define applications boundaries of these techniques. These techniques gives some perspectives for probing applications and allows FA community to use signal processing methods instead of expensive devices.