Reduction of input current harmonics based on space vector modulation for three-phase VSI with varied power factor

This paper proposes space vector modulation (SVM) which reduces the current harmonics flowing through the DC-link capacitor of three-phase motor drive systems. In a conventional SVM, the selection of the space vectors results in the long zero vector period, which increases the inverter input current harmonics. On the other hand, in the proposed SVM, the space vectors are selected in order to actively shorten the zero vector period. Furthermore, by applying the proposed SVM only in the regions where the instantaneous value of the input current is positive, the input current harmonics are reduced even when the load power factor becomes low. Through the experiment applying the proposed SVM, it is confirmed that input current harmonics is reduced by up to 33.9% of that of the conventional method. Moreover, it is confirmed that the input current harmonics with the proposed SVM are reduced in all range of the load power factor compared to that of the conventional SVM.