First steps towards designing a compact language for the description of logic circuits

The paper introduces a new hardware description language, especially designed to be extremely concise compared to the VHDL language. Its purpose is to allow the designer to tackle the problem of digital circuit prototyping in a faster, more compact, uniform and higher-level manner. The proposed language reduces the syntax redundancy and facilitates the rapid description of frequently used functionalities. Examples of using the new language are presented, as well as some guidelines for translating it to VHDL.