CPU/FPGA-Based Real-Time Simulation of a Two-Terminal MMC-HVDC System

This paper presents a methodology for the central-processing unit/field-programmable gate-array (FPGA)-based real-time simulation of a two-terminal MMC-HVDC of up to 501 levels using a detailed equivalent model. The proposed modeling approach is validated using case studies of 101-level and 501-level multilevel modular converter setups. FPGA-based models are designed using low-latency custom-made floating-point operators. The FPGA model is entirely reconfigurable in terms of the number of submodules per arm, as well as circuit parameters on an individual submodule basis. Real-time simulation performance is demonstrated in single-rate and multirate simulation environments and under various operating conditions. Limitations to the detailed equivalent model are identified and discussed.