Efficient architecture for real time implementation of Hilbert Transform in FPGA

This paper presents an architecture for real time hardware implementation of Hilbert Transform (HT) using Fast Fourier Transform (FFT). HT is studied and its various application areas are discussed in the paper. Two different architectures are proposed using Fast Fourier Transform (FFT) for the implementation. Implementation of HT using the proposed FFT based architectures are compared with the implementations using Discrete Fourier Transform (DFT) and Discrete Hartley Transform (DHT). The proposed FFT based architectures are implemented on Xilinx Kintex- 7 based FPGA and the results acquired are presented in comparison to results obtained through MATLAB simulations. The architecture implemented supports transform length of 8192 points as a demonstrator to the idea using 24 bit fixed point arithmetic. Detailed comparison study in terms of resource utilization and timing analysis is also carried out and the results are reported.