Abstract:
Back-gated carbon nanotube field-effect transistors have been fabricated using a wafer-level technology. Source and drain electrodes are structured by lift-off and wet et...Show MoreMetadata
Abstract:
Back-gated carbon nanotube field-effect transistors have been fabricated using a wafer-level technology. Source and drain electrodes are structured by lift-off and wet etching. AFM measurements reveal residual contaminations originating from structuring processes. We investigate the particle removal by an oxygen plasma treatment depending on the process time. I/V characterization reveals a strong dependency of transistor characteristics, especially hysteresis behavior, on surface cleanliness. We find the removal of residual particles to be much more important than a passivation to keep water molecules from the transistor region. We show hysteresis-free transistor behavior even after 9 weeks of storage in air without passivation.
Date of Conference: 08-10 July 2014
Date Added to IEEE Xplore: 21 August 2014
Electronic ISBN:978-1-4799-6384-3