Simulation of the TSV-to-device coupling in 3D ICs for short-channel strained silicon transistors

This paper analyzes Through-Silicon-Via (TSV)-to-device coupling due to the mechanical stress and the electrical field using three dimensional process and device simulation. The analysis considering 40nm and 28nm transistor demonstrates that TSV only has a minor impact on the current of short-channel devices and the effect diminishes with technology scaling.