Real time fault injection using logic emulators

A hardware based approach to Fault Emulation independent of the logic emulation system in use has been developed and is presented in this paper. Fault injection into a targeted circuit is made possible with the introduction of additional logic. The stuck-at-fault model is simulated with the method described here, which may also be used for multiple faults and bridging faults. This discussion will focus only on SSF. Using a commercial emulator, speeds for combinational circuits of several MHz were reached allowing for system testing at real time speed.