Interference nulling and side lobe minimization using space selective digital filter and implementation using digital signal processor

In this paper a Digital Signal Processing based method using space selective digital filters for the linear array pattern synthesis with prescribed nulls in the direction of arrival of interferences and side lobe minimization is presented. The desired array pattern is achieved by modifying only amplitudes of the array weight vector. The proposed model is implemented through the Digital Signal Processor (DSP). Convolution between quiescent array weight vector and filter coefficients of digital filter is performed to obtain the desired array pattern. The proposed model offers advantages like more than 80dB attenuation to interferences, minimization of side lobe levels up to −80dB, lesser computational time and lesser hardware requirements. Numerical as well as graphical result is presented to adjudicate the better performance of the proposed method.