Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory

Nonvolatile memory has become a bottleneck in attempts to reduce the energy consumption of electronic systems. Several emerging forms of nonvolatile memory have shown promise in overcoming these difficulties, achieving faster write speeds and lower power operations than those afforded by Flash memories. Unfortunately, constraints related to bitline bias-voltage, small read cell current, and process variation detract considerably from the efficiency of read operations. This paper provides a review of the challenges and trends associated with the read sensing circuitry used in emerging nonvolatile memories.