Modeling the charge transport and degradation in HfO2 dielectric for reliability improvement and life-time predictions in logic and memory devices

HfO
₂
is currently used in the gate stacks of CMOS logic devices [1] and is widely investigated for its potential application in advanced non-volatile memories such as resistive switching devices (RRAMs) [2]. In both applications, the understanding of the physical mechanisms governing the charge transport and the degradation/breakdown (BD) of the dielectric is fundamental to optimize device operation and reliability, and represents the first step toward accurate lifetime predictions. These goals can be achieved through the development of accurate physics-based models linking the microscopic properties of HfO
₂
to the electrical behavior of the device. We show the model we developed for the charge transport and degradation in HfO
₂
and its application to logic and memory devices.